The MST7500A integrates signal interface receiver with a programmable timing controller. It resides on the flat
panel display and provides the interface signal routing and timing control between graphics or video controllers
and a TFT-LCD system.
the received image data into Mini-LVDS low voltage differential format and synchronous timing suitable for
driving LCD panel column and row drivers. This device can support resolution up to HD (1366x768) panel
interface.
EEPROM to read the display identification data then program initialization values used by the MST7500A. It is
easily configured for variable panel requirement to support mainstream gate and source drivers on the market.
panel display and provides the interface signal routing and timing control between graphics or video controllers
and a TFT-LCD system.
The MST7500A accepts host data through four pairs of input making up the one LVDS bus, which is a low
power, low-EMI interface used between this controller and the host system. The MST7500A then reformatsthe received image data into Mini-LVDS low voltage differential format and synchronous timing suitable for
driving LCD panel column and row drivers. This device can support resolution up to HD (1366x768) panel
interface.
The MST7500A is programmable via an optional and external serial EEPROM for individual RGB gamma
correction to uniform the panel chrominance for best display quality achievement. The system can accessEEPROM to read the display identification data then program initialization values used by the MST7500A. It is
easily configured for variable panel requirement to support mainstream gate and source drivers on the market.
