· Single 5-volt write (erase and program) operations
· Fast page-write operations
- 128 bytes per page
- Page write (erase/program) cycle: 10 mS (max.)
- Effective byte-write (erase/program) cycle time: 39 mS
- Optional software-protected data write
· Fast chip-erase operation: 50 mS
· Two 8 KB boot blocks with lockout
· Whole chip cycling: 10K (typ.)
· Read access time: 70/90/120 nS
· Twenty-year data retention
· Software and hardware data protection
· Low power consumption
- Active current: 25 mA (typ.)
- Standby current: 20 mA (typ.)
· Automatic write (erase/program) timing with internal VPP generation
· End of write (erase/program) detection
- Toggle bit
- Data polling
· Latched address and data
· All inputs and outputs directly TTL compatible
· JEDEC standard byte-wide pinouts
· Available packages: 32-pin 600 mil DIP, 32-pin TSOP, and 32-pin PLCC
